September 12, 2014 // By Rick Merritt

Intel believes it can drive Moores Law down to 7 nm even without long-delayed advances in lithography.

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My day job is working on [research for a process to make] 7 nm [chips and] I believe there is a way without EUV, said Intel fellow Mark Bohr, responding to a question after a talk on Intels new 14 nm process.

The optimism is significant given the core lithography used for patterning chips hasnt had an upgrade in more than a decade. Chipmakers generally dont expect the much-delayed extreme ultraviolet (EUV) lithography in time for 10 nm chips, but many still hold out hopes it could be ready for a 7 nm generation.

I am very interested in EUV [because it] could really help scaling and perhaps process simplification, reducing three or four masks to one in some cases, Bohr said. Unfortunately, its not ready yet -- the throughput and reliability are not there.

Bohr did not give any hints about how Intel will make 7 or even 10 nm chips without EUV. However he did note at 14 nm Intel is using triple patterning on one or more critical layers.

Although wafer costs rose at an accelerating rate for the last two nodes due to the need for more masks, Intel continues to pack more transistors in a given area of silicon. The density offsets wafer costs, leading to the cost-per-transistor decline, Bohr said in his talk on Intels 14 nm process.

One of the fundamental benefits of Moores Law is smaller feature sizes, primarily to get lower cost per transistor so we can do more things in a similarly sized chip, he said.

Intel already announced it has started making in volume chips using a 14 nm process at a lower cost per transistor than its prior 22 nm generation. It also said it is in development of a 10 nm process that it believes will deliver lower cost per transistor.

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EUV not needed at 10 or 7nm, says Intel