WekaIO, a startup offering a cloud-based storage platform that can support exabytes of data in single namespace, emerged from stealth earlier this week. The company is touting the new product as the worlds fastest distributed file system.

Founded by Liran Zvibel, Omri Palmon, and Maor Ben-Dayan in 2013, WekaIO is headquartered in San Jose, California, and does its engineering there and in Tel Aviv, Israel. The startup has attracted more than $32 million in venture capital from Qualcomm, Walden Riverwood, Gemini Israel, and Norwest Venture Partners, in addition to a number of individual investors.

The cloud-based software platform, known as Matrix, is aimed at a wide swath of performance-demanding workloads, such as financial modeling, media rendering, engineering, bioinformatics, scientific simulations, and data analytics, as well as a variety of web applications. It is currently deployed at two major media and entertainment studios and TGen, a genomics research company focused on human health concerns.

TGen is dedicated to the next revolution in precision medicinewith the goal of better patient outcomes driving our core principles, said Nelson Kick, manager of HPC operations at TGen. Future-thinking companies like WekaIO, complement our core principle of accelerating research and discovery. The ability to run more concurrent high performance genomic workloads will significantly advance our time to discovery.

WekaIO essentially works by aggregating local storage across a traditional x86-based compute cluster or server farm. It relies on local SSD storage to deliver performance, but the specific amounts and types of flash devices are up to the customer. In general, the working data resides on the SSD, while cold data is auto-tiered to the cloud either public or private in an object store, like S3 or Swift.

The Matrix software runs on one or two cores on each WekaIO host, so performance scales naturally as the size of the cluster grows. Each core delivers 30,000 IOPs and 400 MB/sec of throughput, and does so with less than 500 us of latency. Thus, a typical 100-node cluster can provide 3 million IOPS and 40 GB/sec to an application. The minimum cluster size is six servers, and it scales up from there to thousands of servers. Here are the specs taken from the Matrix datasheet:

Matrixs closest competition is IBMs Spectrum Scale (previously known as GPFS). According to WekaIO, measured with the SPEC SFS 2014 benchmark on AWS instances, Matrix servers processed four times the workload compared to those running Spectrum Scale. The WekaIO software was able to accomplish this using just 5 percent of the computational resources on those instances.

The following video describes the technical rationale for Matrix in more detail and highlights its architectural elements.

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High Performance Storage Provider WekaIO Emerges from Stealth Mode - TOP500 News

The Alan Turing Institute is getting some extra supercomputing muscle from Cray.

The Alan Turing Institute stands to benefit from a new Cray Urika-GX supercomputer, through collaboration between Cray, Intel, and the institute. The supercomputer will be hosted at the University of Edinburgh in its Parallel Computing Centre (EPCC).

The Alan Turing Institute is the UK's national institute for data science, and brings together researchers from a range of disciplines with the aim of tackling core challenges in data science theory and application.

Named in honor of Alan Turing, who did pioneering work in computer science, the institute is a key centre for the disciplines that make up data science. This new addition to the institute's computing power will provide researchers with access to Cray's analytics platform, which brings together supercomputing technologies and a software framework for big data analytics.

"The Alan Turing Institute was created to advance the world-changing potential of data science," said Alan Wilson, CEO of the institute. "Our researchers require powerful computing technology... to enable their research, and the Cray system... will be an important addition to the Turing's data science toolkit."

According to Cray, an exclusive feature of the Urika-GX is its Cray Graph Engine, which aims to leverage Cray's high-speed Aries network interconnect, in order to provide what it said is "unprecedented, large-scale graph pattern matching and discovery operations across complex collections of data".

Also supported is the Apache Spark cluster engine and the Apache Hadoop software library, to help provide "the tools necessary for large-scale analytics and machine learning operations," the company said.

Underlying the analytics stack, is an open high-performance system featuring the Intel Xeon processor E5 v4 product family, up to 22 terabytes of DRAM memory, and up to 176 terabytes of local Intel P3700 series SSD storage capacity.

A spokesman for Cray said the supercomputer and its associated software are being provided free of charge by Cray and Intel.

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Alan Turing Institute to benefit from a new supercomputer - ZDNet

One of the more significant architectural advancements in Intels new Xeon scalable processor, aka Skylake, is the use of a mesh interconnect thatlink cores and other on-chip componentry.

In a blog posted last month by Intel Engineer Akhilesh Kumar, he described the need to design the right kind of interconnect to link up the various parts on the processor die. The task of adding more cores and interconnecting them to create a multi-core data center processor may sound simple, but the interconnects between CPU cores, memory hierarchy, and I/O subsystems provide critical pathways among these subsystems necessitating thoughtful architecture, he wrote.

In the case of the new Xeon processors, the mesh is a 2D interconnect that links cores, shared cache, memory controllers, and I/O controllers on the chip. The mesh is arranged in rows and columns, with switches at the intersections so that data may be directed to the shortest path. The schematic below shows an example of the mesh with a 22-core Xeon die.

Source: Intel

Prior to the Skylake product, Intel employed a ring interconnect to glue these pieces together. With a ring setup, communication bandwidth, and especially latency, can become a problem as more cores and interfaces are added. Thats because when there are too many endpoints on the interconnect, data must often travel across many intermediate hops to get from its source to its destination. With up to 28 cores, 48 PCIe lanes, and six memory channel interfaces per processor, the new chips became too complex for a simple ring topology.

Since a mesh offers a row/column topology, data traversal across the chip becomes less arduous, which theoretically improves performance. Its a bit of a tradeoff, inasmuch as you have to devote more chip real estate and power to the meshs wires and switches. But as processors evolve from multicore into manycore platforms, such a development is unavoidable. Its notable that Intels Xeon Phi products, which have dozens of cores, use a similar sort of mesh, although in this case the cores are arranged in dual-core tiles, which cuts the number of switches in half.

Another advantage of the mesh is that it enables last level L3 cache that is spread acrossthe cores to be accessed with lower latency, which, as Kumar puts it, allows software to treat the distributed cache banks as one large unified last level cache. As a result, applications behave more consistently and developers dont have to worry about variable latencies as their applications arescaled across more cores. The same goes for memory and I/O latencies, since these controller interfaces are also included in the on-chip mesh.

Presumably Intel will be able to leverage the mesh technology across subsequent generations of the Xeon processor, even as core counts increase. Theoretically, another interconnect design will be needed at some point, since even a 2D topology will become constricting if processors start sprouting hundreds of cores. But that day is probably far in the future.

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Growing Core Count Led Intel to Mesh Architecture | TOP500 ... - TOP500 News

After already shipping more than half a million of its next-generation Xeon products to customers, Intel officially launched its new Xeon scalable processor product line. The chipmaker is calling it the biggest data center advancement in a decade.

The feature set and broad contours of these new chips, which were previously code-named Skylake, have been known for some time. Back in May, we found out the new processors would be offered in four categories Platinum, Gold, Silver, and Bronze -- which generally represent decreasing core counts, performance, and capabilities as you progress through the metal monikers. This new hierarchy would replace the E3, E5, E7 categories of previous Xeon product lines.

Source: Intel

Presiding over his first Xeon platform launch, Navin Shenoy, Intels new general manager of the Data Center Group, talked at length about what the company sees as the big growth opportunity for these latest Xeons: cloud computing, AI & analytics, and the new applications propelled by the transition from 4G to 5G wireless networks.

The first area, cloud computing, is where these datacenter processors are shipping in greatest volume these days. Shenoy noted that the number of Xeons being sold into cloud setups has doubled over the last three years. We anticipate that nearly 50 percent of our Xeon shipments by the end of 2017 will be deployed into either public or private cloud infrastructure, he said.

Some of these, no doubt, will be running high performance computing workloads, and although there was not much talk at the launch event devoted to HPC, the new processors have plenty to offer in this regard. In particular, the inclusion of 512-bit Advanced Vector Extensions (AVX-512) support and the integration of the Omni-Path interconnect on some of the Xeon models, are notable additions for the performance crowd. Up until now, both features were available only in Intels Xeon Phi products, processors that are designed exclusively for high-performance workloads

The AVX-512 provides 32 vector registers, each of which is 512 bits wide. These are twice the width of the 256-bit wide vectors available with the older AVX and AVX2 instruction set, which means performance can be doubled of many types of scientific simulations that rely heavily on floating point operations. AVX-512 also supports integer vectors, which can be applied to applications such as genomics analysis, virtual reality, and machine learning.

This feature can offer some serious speedups at the application level. Intel claimed a 1.72x performance boost on LAMMPS, a popular molecular dynamics code, when running on the 24-core Xeon Platinum 8168 processor, compared to the same code running on the previous generation Xeon E5-2697 v4 (Broadwell) chip. Overall, the company recorded an average 1.65x performance improvement across a range of datacenter workloads, which included applications like in-memory analytics (1.47x), video encoding (1.9x), OLTP database management (1.63x), and package inspection (1.64x).

The Linpack numbers are certainly impressive on the high-end SKUs. A server equipped with two 28-core Xeon Platinum 8180 processors, running at 2.5 GHz, turned in a result of 3007.8 gigaflops on the benchmark, which means each chip can deliver about 1.5 Linpack teraflops. Thats more than twice the performance of the original 32-core Knights Ferry Xeon Phi processor, and even better than the 50-core Knights Corner chip released in 2012. Even the current Knights Landing generation of Xeon Phi tops out at about 2 teraflops on Linpack using 72 cores. Keep in mind that the most expensive Knights Landing processor can be had for less than $3400 nowadays, while the Xeon Platinum 8180 is currently priced at $10,009. So if its cheap flops youre after, and your codes scale to 60 cores or more, the choice becomes pretty obvious.

Intel is also promising better deep learning performance on the new silicon. The company says they are getting 2.2 times faster speeds on both training and inferencing neural networks compared to the previous generation products. Ultimately, the Xeon line is not meant to compete with Intels upcoming products specifically aimed at these workloads, but they can serve as a general-purpose platform for these applications where specialized infrastructure is not warranted or not obtainable.

The integration of the high-performance Omni-Path (OPA) fabric interface is another Xeon Phi feature that was slid into the new Xeons. Its only available on some of the Platinum and Gold models, not the lesser Silver and Bronze processors, since these are unlikely to be used in HPC setups. OPA integration adds about $155 to the cost of the chip compared to its corresponding non-OPA SKU. Since a separate adapter retails for $958 and takes up 16 lanes of the processors PCIe budget, its a no-brainer to opt for the integrated version if youre committed to Omni-Path. If youre considering InfiniBand as well, that decision becomes trickier.

Source: Intel

Of the more than 500,000 Xeon scalable processors already shipped, about 8,600 of those went into three TOP500 supercomputers. One of these is the new 6.2-petaflop MareNostrum 4 system that recently came online at the Barcelona Supercomputing Center. That system, built by Lenovo, is equipped with more than 6,000 24-core Xeon Platinum 8160 processors. The other two machines are powered by 20-core Xeon Gold chips: one, a 1.75-petaflop HPE machine running at BASF in Germany, and the other, a 717-teraflop system constructed by Intel and running in-house.

Other early customers include AT&T, Amazon, Commonwealth Bank, Thomas Reuters, Monefiore Health, and the Broad Institute, among others. The first customer for the new Xeons was Google, which started deploying them into their production cloud back in February. According to Google Platforms VP Bart Sano,, cloud customers are already using the silicon for applications like scientific modeling, engineering simulations, genomics research, finance, and machine learning. On these workloads, performance improvements of between 30 to 100 percent are being reported.

Prices for the new chips start at $213 for a six-core Bronze 3104 and extend all the way up to $13,011 for the 28-core Platinum 8180M processor. The fastest clock 3.6 GHz is found on the four-core Platinum 8156 chip. A complete list of available processors can be found here.

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Intel Forges New Xeon Line Under Scalable Processor Banner - TOP500 News

July 11, 2017 Nicole Hemsoth

Supercomputing centers around the world are preparing their next generation architectural approaches for the insertion of AI into scientific workflows. For some, this means retooling around an existing architecture to make capability of double-duty for both HPC and AI.

Teams in China working on the top performing supercomputer in the world, the Sunway TaihuLight machine with its custom processor, have shown that their optimizations for theSW26010 architecture on deep learning models have yielded a 1.91-9.75X speedup over a GPU accelerated model using the Nvidia Tesla K40m in a test convolutional neural network run with over 100 parameter configurations.

Efforts on this system show that high performance deep learning is possible at scale on a CPU-only architecture. The Sunway TaihuLight machine is based on the 260-core Sunway SW26010, which we detailed here from both a chip and systems perspective. The convolutional neural network work was bundled together as swDNN, a library for accelerating deep learning on the TaihuLight supercomputer

According to Dr. Haohuan Fu, one of the leads behind the swDNN framework for the Sunway architecture (and associate director at the National Supercomputing Center in Wuxi, where TaihuLight is located), the processor has a number of unique features that couple potentially help the training process of deep neural networks. These include the on-chip fusion of both management cores and computing core clusters, the support of a user-controlled fast buffer for the 256 computing cores, hardware-supported scheme for register communication across different cores, as well as the unified memory space shared by the four core groups, each with 65 cores.

Despite some of the features that make the SW26010 a good fit for neural networks, there were some limitations teams had to work around, the most prominent of which was memory bandwidth limitationssomething that is a problem on all processors and accelerators tackling neural network training in particular. The DDR3 memory interface provides a peak bandwidth of 36GB/s for each compute group (64 of the compute elements) for a total bandwidth of 144 GB/s per processor. The Nvidia K80 GPU, with a similar double-precision performance of 2.91 teraflops, provides aggregate memory bandwidth of 480 GB/sTherefore, while CNNs are considered a compute-intensive kernel care had to be taken with the memory access scheme to alleviate the memory bandwidth constraints. Further, since the processor does not have a shared buffer for frequent data communications as are needed in CNNs, the team had to rely on a fine-grained data sharing scheme based on row and column communication buses in the CPU mesh.

The optimized swDNN framework, at current stage, can provide a double-precision performance of over 1.6 teraflops for the convolution kernels, achieving over 50% of the theoretical peak. The significant performance improvements achieved from a careful utilization of the SW26010s architectural features and a systematic optimization process demonstrate that these unique features and corresponding optimization schemes are potential candidates to be included in future DNN architectures as well as DNN-specific compilation tools.

According to Fu, By performing a systematic optimization that explores major factors of deep learning, including the organization of convolution loops, blocking techniques, register data communication schemes, as well as reordering strategies for the two pipelines of instructions, the SW26010 processor on the Sunway TaihuLight supercomputer has managed to achieve a double-precision performance of over 1.6 teraflops for the convolution kernel, achieving 54% of the theoretical peak.

To further get around the memory bandwidth limitations, the team created a three-pronged approach to memory for its manycore architecture. Depending on what is required, the CPE (compute elements) mesh can access the data items either directly from global memory or from the three-level memory hierarchy (register, local data memory and larger, slower memory).

Part of the long-term plan for the Sunway TaihuLight supercomputer is to continue work on scaling traditional HPC applications to exascale, but also to continue neural network efforts in a companion direction. Fu says that TaihuLight teams are continuing the development of swDNN and are also collaborating with face++ for facial recognition applications on the supercomputer in addition to work with Sogou for voice and speech recognition. Most interesting (and vague) was the passing mention of a potential custom chip for deep learning, although he was non-committal.

The team has created a customized register communication scheme that targets maximizing data reuse in the convolution kernels, which reduces the memory bandwidth requirements by almost an order of magnitude, they report in the full paper (IEEE subscription required). A careful design of the most suitable pipelining of instructions was also built that reduces the idling time of the computation units by maximizing the overlap of memory operation and computation instructions, thus maximizing the overall training performance on the SW26010.

Double precision performance results for different convolution kernels compared with the Nvidia Tesla K40 using the cuDNNv5 libraries.

To be fair, the Tesla K40 is not much of a comparison point to newer architectures, including Nvidias Pascal GPUs. Nonetheless, the Sunway architecture could show comparable performance with GPUs for convolutional neural networkspaving the way for more discussion about the centrality of GPUs in current deep learning systems if CPUs can be rerouted to do similar work for a lower price point.

The emphasis on double-precision floating point is also of interest since the trend in training and certainly inference is to push lower while balancing accuracy requirements. Also left unanswered is how convolutional neural network training might scale across the many nodes availablein short, is the test size indicative of the scalability limits before the communication bottleneck becomes too severe to make this efficient. However, armed with these software libraries and the need to keep pushing deep learning into the HPC stack, it is not absurd to think Sunway might build their own custom deep learning chip, especially if the need arises elsewhere in Chinawhich we suspect it will.

More on the deep learning library for the Sunway machine can be found at GitHub.

Categories: AI, HPC, ISC17

Tags: ISC17, TaihuLight

OpenPower, Efficiency Tweaks Define Europes DAVIDE Supercomputer The X86 Battle Lines Drawn With Intels Skylake Launch

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China Tunes Neural Networks for Custom Supercomputer Chip - The Next Platform

The supercomputer that monitors the stock market for Didier Sornette has diagnosed a bubble in four sectors of the market and has recommended shorting the FANG stocks.

Sornettes bubble calls result in a crash of at least 20% roughly 60% of the time. In those cases, the crash reaches its target within two weeks of the bubble call.

The other 40% of the time, the market starts a sideways move that can take months but usually breaks out downwards into a correction of at least 20%. Occasionally its less, like 15%. It can be a lot more (like the dot-com crash).

Occasionally the sideways move is fast and results in an upwards breakout that extends the bubble. You can get a few of these extensions (as at the top of the dot-com bubble) before a bigger crash.

QQQ is a Favorite to Put In a H&S with a Triangle Right Shoulder Here (Green Scenario)

is potentially putting one of the strongest possible topping patterns on its daily charta head and shoulders with a triangle right shoulder. The likelihood of that topping scenario is increased by the big red candle QQQ put in a June 9. That was a Neely short set-up for a retrace of the move out of the February 2016 low.

QQQ Needs a Retrace to the Bottom of its Light Blue Rising Wedge and Navy Blue Megaphone VWAP

QQQ needs a serious stab at a retrace to VWAP of its navy blue long-term megaphone, which started forming in July 2014, to be legal for an upwards breakout from the megaphone (green scenario). That would also retrace the light blue rising wedge.

QQQ could also go all the way for the navy blue megaphone bottom, but the fast topping process in the green scenario would make that scenario less likely.

The purple scenario becomes more likely if QQQ goes for delay and a more extended topping process. The charts are aligned beautifully with Sornettes call.

Original post

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Sornette Supercomputer Calls For A Crash - Investing.com

July 11, 2017 Jeffrey Burt

When talking about the future of supercomputers and high-performance computing, the focus tends to fall on the ongoing and high-profile competition between the United States with its slowly eroding place as the kingpin in the industry and China and the tens of billions of dollars that the government has invested in recent years to rapidly expand the reach of the countrys tech community and the use of home-grown technologies in massive new systems.

Both trends were on display at the recent International Supercomputing Conference in Frankfurt, Germany, where China not only continued to hold the top two spots on the Top500 list of the worlds fastest supercomputers with the Sunway TaihuLight and Tianhe-2 systems, but a performance boost in the Cray-based Piz Daint supercomputer in Switzerland pushed it into the number-three spot, marking only the second time in 24 years and the first time since November 1996 that a U.S.-based supercomputer has not held one of the top three spots.

That said, the United States had five of the top 10 fastest systems on the list, and still has the most 169 of the top 500, with China trailing in second at 160. But as weve noted here at The Next Platform, the United States dominance of the HPC space is no longer assured, and the combination of Chinas aggressive efforts in the field and worries about what a Trump administration may mean to funding of U.S. initiatives has fueled speculation of what the future holds and has garnered much of the attention.

However, not to be overlooked, Europe as illustrated by the rise of the Piz Daint system, which saw its performance double with the addition of more Nvidia Tesla 100 GPU accelerators is making its own case as a significant player in the HPC arena. For example, Germany houses 28 of the supercomputers in the latest Top500 list released last month, with France and the United Kingdom both with 17. In total, Europe houses 105 of the Top500 systems, good for 21 percent of the market and third behind the United States and China.

Something that didnt generate a lot of attention at the show was the introduction of the DAVIDE (Development for an Added Value Infrastructure Designed in Europe) system onto the list, coming in at 299 with a performance of 654.2 teraflops and a peak performance of more than 991 teraflops. Built by Italian vendor E4 Computer Engineering, DAVIDE came out of a multi-year Pre-Commercial Procurement (PCP) project of the Partnership for Advanced Computing in Europe (PRACE), a nonprofit association headquartered in Brussels. PRACE in 2014 kicked off the first phase of its project to fund the development of a highly power-efficient HPC system design. PCP is a process in Europe in which different vendors compete through multiple phases of development in a project. A procurer like PRACE gets multiple vendors involved in the initial stage of the program and then compete through phases solution design, prototyping, original development and validation and testing of first projects. Through each evaluation phase, the number of competing vendors is reduced. The idea is to have the procurers share risks and benefits of innovation with the vendors. Over the course of almost three years, the number of system vendors for this program was whittled down from four E4, Bull, Megaware and Maxeler Technologies with E4 last year being awarded the contract to build its system.

The goal was to build an HPC system that can run highly parallelized, memory-intensive workloads such as weather forecasting, machine learning, genomic sequencing and computational fluid dynamics, the type of applications that are becoming more commonplace in HPC environments. At the same time, power efficiency also was key. With a peak performance of more than 991 teraflops, the 45-node cluster consumes less than 2 kilowatts per node, according to E4.

E4 already offers systems powered by Intels x86 processors, ARM-based chip and GPUs, but for DAVIDE, the company opted for IBMs OpenPower Foundation, an open hardware development community that IBM officials launched with partners like Nvidia and Google in 2014 to extend the reach of the vendors Power architecture beyond the core data center and into new growth areas like hyperscale environments and emerging workloads including machine learning, artificial intelligence and virtual reality while cutting into Intels dominant share of the server chip market. E4 already is a member of the foundation and builds other systems running on Power.

Each 2U node of the cluster is based on the OpenPower systems design codenamed Minsky and runs on two 3.62GHz Power8+ eight-core processors and four Nvidia Tesla P100 SXM2 GPUs based on the companys Pascal architecture and aimed at such modern workloads as artificial intelligence and climate predictions. The GPUs are hooked into the CPUs via Nvidias NVLink high-speed interconnect, and the nodes use Mellanox Technologies EDR 100 Gb/s Infiniband interconnects as well as 1 Gigabit Ethernet networking. Each node offers a maximum performance of 22 TFlops. In total, the cluster runs on 10,800 Power8+ cores, with 11,520GB of memory and SSD SATA and NVMe drives for storage. It runs the CentOS Linux operating system

The Minsky nodes are designed to be air-cooled, but to increase the power efficiency of the system, E4 is leveraging technology from CoolIT Systems that uses direct hot-water cooling at between 35 and 40 degrees Celsius for the CPUs and GPUs, with cooling capacity of 40 kW. Each rack includes an independent liquid-liquid or liquid/air heat exchanger unit with redundant pumps, and the compute nodes are connected to the heat exchange via pipes and a side bar for water distribution. E4 officials estimate that the CoolIT technology can extract about 80 percent of heat generated by the nodes.

The chassis is custom-built and based on the OpenRack form factor.

Power efficiency is further enhanced by software developed in conjunction with the University of Bologna that enables fine-grain measuring and monitoring of power consumption by the nodes and the system as a whole through data collected from components like the CPUs, GPUs, memory components and fans. There also is the ability to cap the amount of power used and schedule tasks based on the amount of power being consumed and to profile the power an application uses, according to the vendor. A dedicated power monitor interface based on the BeagleBone Black Board, an open-source development platform enables frequent direct sampling from the power backplane and integrates with the system-level power management software.

DAVIDE takes advantage of other IBM technologies, including IBM XL compilers, ESSL math library and Spectrum MPI, and APIs enable developers to tune the clusters performance and power consumption.

E4 currently is making DAVIDE available to some users for just jobs as porting applications and profiling energy consumption.

Categories: HPC, ISC17

Tags: e4

Ethernet Getting Back On The Moores Law Track

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OpenPower, Efficiency Tweaks Define Europe's DAVIDE Supercomputer - The Next Platform

The supercomputer that monitors the stock market for Didier Sornette has diagnosed a bubble in four sectors of the market and has recommended shorting the FANG stocks.

Sornettes bubble calls result in a crash of at least 20% roughly 60% of the time. In those cases, the crash reaches its target within two weeks of the bubble call.

The other 40% of the time, the market starts a sideways move that can take months but usually breaks out downwards into a correction of at least 20%. Occasionally its less, like 15%. It can be a lot more (like the dot-com crash).

Occasionally the sideways move is fast and results in an upwards breakout that extends the bubble. You can get a few of these extensions (as at the top of the dot-com bubble) before a bigger crash.

QQQ is a Favorite to Put In a H&S with a Triangle Right Shoulder Here (Green Scenario)

PowerShares QQQ Trust Series 1 (NASDAQ:) is potentially putting one of the strongest possible topping patterns on its daily chart a head-and-shoulders with a triangle right shoulder. The likelihood of that topping scenario is increased by the big red candle QQQ put in a June 9. That was a Neely short setup for a retrace of the move out of the February 2016 low.

QQQ Needs a Retrace to the Bottom of its Light Blue Rising Wedge and Navy Blue Megaphone VWAP

QQQ needs a serious stab at a retrace to VWAP of its navy blue long-term megaphone, which started forming in July 2014, to be legal for an upwards breakout from the megaphone (green scenario). That would also retrace the light blue rising wedge.

QQQ could also go all the way for the navy blue megaphone bottom, but the fast topping process in the green scenario would make that scenario less likely.

The purple scenario becomes more likely if QQQ goes for delay and a more extended topping process. The charts are aligned beautifully with Sornettes call.

Read more:

Sornette Supercomputer Calls For Crash - Investing.com

IBM on Monday pledged the equivalent of $200 million in computing resources, cloud services and weather data to help scientists research climate change and explore ways to mitigate its effects.

The company plans to sponsor up to five research projects that could benefit from the World Community Grid, an IBM initiative that provides huge amounts of free computing power for large-scale environmental and health-related research projects. The Grid is powered by computers and Android devices belonging to more than 730,000 worldwide volunteers. The volunteers download an app, and when their devices aren't in full use, it uses them to automatically perform virtual experiments.

The Grid has hosted a number of environment-related projects, such as Harvard's work identifying 36,000 carbon-based compounds with strong potential for converting sunlight into electricity. Scientists have also used the World Community Grid to study issues like crop resiliency and innovative ways to improve water filtration.

"Computational research is a powerful tool for advancing research on climate change and related environmental challenges," Jennifer Ryan Crozier, VP of IBM Corporate Citizenship, said in a statement.

IBM will choose the projects based on their scientific merit, their potential global impact and the capacity of the research team to manage a sustained research project. Scientists who submit proposals can apply to receive free IBM cloud storage resources and free access to global weather data from The Weather Company, an IBM Business. The company is accepting applications here on a rolling basis, with a first-round deadline of September 15.

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IBM pledges help tackle climate change with its virtual ... - ZDNet - ZDNet

Posted July 10, 2017 07:00:00

Tucked away inside a modest-looking building at the Australian National University is the most powerful supercomputer in the Southern Hemisphere.

Since 2013 the National Computational Infrastructure (NCI) has been supporting research projects across the country.

Its high-performance computer, Raijin, is able to cope with enormous amounts of data.

"We have over 50 petabytes of research data stored at NCI and a high-performance cloud," NCI spokesperson Lucy Guest said.

"It's for science that's too big or too small, too fast or too slow, too expensive or too dangerous to happen anywhere else in the world."

In digital storage terms, one petabyte is 1,000,000,000,000,000 bytes (one quadrillion bytes or 1,000 terabytes).

The supercomputer is made up of thousands of computers simultaneously sharing the tasks of a project.

"You might want to look at the human genomes, for example," Ms Guest said.

"So you have petabytes of data that you need to sift through to sequence human genomes and it needs to be done quickly.

"Or if you want to map the entire Southern Ocean and look at variables like wind and salt and temperature, you need something really big with a lot of guts behind it."

Raijin supports the work of more than 4,000 researchers including those at the CSIRO, Geoscience Australia and the Bureau of Meteorology.

"Most of the scientists who use the supercomputer will never actually see it," Ms Guest said.

"You submit your job through online code and it bubbles away in the supercomputer and then spits out your results."

Steam billowing from the NCI building is generated by Raijin, which is running at about 95 degrees Celsius.

"Running over 80,000 computer cores 24 hours a day produces a lot of heat," Ms Guest said.

"Raijin runs at 95C and needs constant cooling.

"We use a system called free cooling."

Free cooling uses fans to dissipate the heat produced by the computer through a series of radiators.

"There's a hot aisle where all of the heat from the supercomputer is trapped," Ms Guest said.

"Fans suck out the heat and water collects that heat which is directed to the roof where it escapes as steam."

Ironically, given the amount of climate research processed by Raijin, the NCI uses about the same amount of electricity as a small suburb in Canberra.

"We have banks of batteries that kick in if the power goes down," Ms Guest said.

"And we have two giant diesel generators that then kick in to keep the data alive, so data is never lost."

Topics: computers-and-technology, research-organisations, science-and-technology, research, human-interest, canberra-2600

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Raijin is the supercomputer Australian researchers call on to crunch the numbers - ABC Online

Mateo Valero is Director of the Barcelona Supercomputing Center

In this video from ISC 2017, Mateo Valero from the Barcelona Supercomputing Center describes the innovations behind MareNostrum 4, the #13 supercomputer on the TOP500.

MareNostrum 4, hosted by Barcelona Supercomputing Center, is entirely aimed at generating scientific knowledge and its computer architecture has been called the most diverse and interesting in the world by international experts. Equipped with Intels latest processing and networking technologies, MareNostrum provides 11.1 Petaflops of processing power to scientific production. This is the capacity of the general-purpose cluster, the largest and most powerful part of the supercomputer, which will be increased thanks to the installation of three new, smaller-scale clusters, featuring emerging technologies, over the next few months. The capacity of 11.1 Petaflops is 10 times greater than that of MareNostrum 3, which was installed between 2012 and 2013.

According to the Top500 ranking published on 19 June, the MareNostrum 4 supercomputers general-purpose cluster is the third most powerful one in Europe and the thirteenth in the world. The Top500 list is based on how quickly supercomputers execute the high-performance linpack benchmark.

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Mateo Valero on how the MareNostrum 4 Supercomputer will ... - insideHPC

Short Bytes:IBM has announced that it is developing brain-inspired an AI supercomputing system. The system is quite similar to the biological brain. It has 64 million neurons and 16 billion synapses. The chief of the development project has emphasized on IBMs production over the last six years. He also believes that IBM will soon become a leading company in the AI innovations.

IBM and the US Air Force Research Laboratory (AFRL), on 23rd of June, announced that they are developing a brain-inspired supercomputing system. The design and pattern of the system are very similar to the real brain structure. Its sensory processing power is equivalent of 64 million neurons and 16 billion synapses, while the processor component will consume the energy of merely 10 watts.

IBM TrueNorth Neurosynaptic systems 64-chip array will power the system. IBM believes that TrueNorths designs will be much efficient than the systems that develop conventional chips. TrueNorth system can convert data like images and videos into symbols in real time.

The system will facilitate data parallelism and model parallelism. The system is devised such that if one part stops working, other will continue without any disturbance. Though not entirely a brain, it is very similar.

As the right brain is for perception and the left for symbol processing, AFRL combines these two capabilities into the conventional computer system.AFRL was the earliest adopterofTrueNorth for converting data into decisions,said Daniel S. Goddard, director, information Directorate, U.S. Air Force Research Lab.

This Neurosynaptic system will assist AFRLs technological designings for Air Force because of such technical advances on its side.

Dharmendra S. Modha, chief scientist of this research, said that the advancement in IBM TrueNorth marks their possibility of leading in AI Hardware Innovation industry. He also mentioned that the company has increased the number of neurons per system from just 256 to 64 million,in last six years.

TrueNorth Neurosynaptic System was initially worked upon under the authority of Defense Advanced Research Projects AgencyS (DARPA) syNAPSE program.

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IBM And US Air Force Are Building Brain-Inspired An AI Supercomputer - Fossbytes

Mellanox has entered new territory with its recently announced Spectrum-2 line of Ethernet switches, which supports speeds of 200 gigabits per second and beyond.

Spectrum-2 supports a wide range of ports 400GbE, 200GbE, 100GbE, 40GbE, 50GbE, 25GbE, and 10GbE in various mixes, and lots of networking capacity from 3.4 to 6.4 terabits per second. The portfolio will initially consist of four switches, as presented below.

Source: Mellanox

The SN3700 is mainly for cloud and hyperscale environments, while the SN3700 is being targeted to hyper-converged solutions. The SN3100 and SN3200 are aimed at storage solutions, especially the speedier flash-based storage. The SN3200 is the only switch of the bunch outfitted with 400GbE network ports.

Latency is on the order of 300 ns, port-to-port, which Mellanox says is 1.5 to 7 times better than its competitors. With power consumption below 220 watts, the company is also claiming 1.3x to 1.6x better energy efficiency. Likewise, its ability to deliver up to 9.52 billion packets per second (with zero packet loss) is said to be 1.6 to 8 times better than its rivals.

Thanks to some of the IP that was brought over from its InfiniBand line, Spectrum-2 also offers advanced features like advanced congestion control, adaptive routing, and fine-grain load balancing. The switches also contain the smarts for dynamic allocation of buffer resources and highest bursts absorption.

As one of the first vendors to make the jump beyond 100GbE, Mellanox should be able stake out the high end of the market for cloud, hyperscale, and enterprise customers needing every-increasing amounts of network capacity and scalability. The company is also targeting the financial and artificial intelligence domains as areas that could take advantage of Spectrum-2s greater capabilities.

Although Mellanox is not specifically going after the traditional HPC market with the Spectrum-2 switches, there are certainly application areas where this gear would be applicable. In particular, much of the financial services space that uses HPC clusters remains Ethernet based. For many of these applications, such are high frequency and algorithmic trading, the extra performance could provide a competitive edge.

In general though, Mellanox expects the majority of HPC buyers to opt for their InfiniBand gear, which, at least with the HDR Quantum switches, offer the same 200 gigabits per second of network bandwidth. And these InfiniBand switches offer even lower port-to-port latency (90 ns) and higher throughput (15.8 billion messages per second) than their Ethernet counterparts.

If the testimonials collected in the Mellanox press release are any indication, the new switches should have a bring future. Execs from Baidu, LinkedIn, HPE, IBM, Inspur, Sugon, and a number of other potential customers, all offered kind words for the Spectrum 2, praising its performance, scalability, advanced feature set.

For developers wanting to get a jump on the transition to 200GbE, the Spectrum-2 software development kit is available now for partners and customers desiring early access. The Spectrum-2 switch ASIC is expected to be available later this year.

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Mellanox Opens Up Ethernet Performance Lead with 200GbE Switches - TOP500 News

July 6, 2017 Sequence-specific, twist-induced, kinked elastic configurations, generated by molecular dynamics simulations on supercomputers at the Texas Advanced Computing Center, help explain how long strands of DNA can fit in small spaces. Credit: Christopher G. Myers, B. Montgomery Pettitt, University of Texas Medical Branch

A biological mystery lies at the center of each of our cells, namely: how one meter of DNA can be wadded up into the space of a micron (or one millionth of a meter) within each nucleus of our body.

The nuclei of human cells are not even the most crowded biological place that we know of. Some bactiophagesviruses that infect and replicate within a bacteriumhave even more concentrated DNA.

"How does it get in there?" B. Montgomery (Monte) Pettitt, a biochemist and professor at the University of Texas Medical Branch, asks. "It's a charged polymer. How does it overcome the repulsion at its liquid crystalline density? How much order and disorder is allowed, and how does this play a role in nucleic acids?"

Using the Stampede and Lonestar5 supercomputers at The University of Texas at Austin's Texas Advanced Computing Center (TACC), Pettitt investigates how phages' DNA folds into hyper-confined spaces.

Writing in the June 2017 issue of the Journal of Computational Chemistry, he explained how DNA may overcome both electrostatic repulsion and its natural stiffness.

The key to doing so? Kinks.

The introduction of sharp twists or curves into configurations of DNA packaged within a spherical envelope significantly reduces the overall energies and pressures of the molecule, according to Pettitt.

He and his collaborators used a model that deforms and kinks the DNA every 24 base pairs, which is close to the average length that is predicted from the phage's DNA sequence. The introduction of such persistent defects not only reduces the total bending energy of confined DNA, but also reduces the electrostatic component of the energy and pressure.

"We show that a broad ensemble of polymer configurations is consistent with the structural data," he and collaborator Christopher Myers, also of University of Texas Medical Branch, wrote.

Insights like these cannot be gained strictly in the lab. They require supercomputers that serve as molecular microscopes, charting the movement of atoms and atomic bonds at length- and time-scales that are not feasible to study with physical experiments alone.

"In the field of molecular biology, there's a wonderful interplay between theory, experiment and simulation," Pettitt said. "We take parameters of experiments and see if they agree with the simulations and theories. This becomes the scientific method for how we now advance our hypotheses."

Problems like the ones Pettitt is interested in cannot be solved on a desktop computer or a typical campus cluster, but require hundreds of computer processors working in parallel to mimic the minute movements and physical forces of molecules in a cell.

Pettitt is able to access TACC's supercomputers in part because of a unique program known as the Journal of Computational Chemistry initiative, which makes TACC's computing resources, expertise and training available to researchers within the University of Texas Systems' 14 institutions.

"Computational research, like that of Dr. Pettitt, which seeks to bridge our understanding of physical, chemical, and ultimately biological phenomena, involves so many calculations that it's only really approachable on large supercomputers like TACC's Stampede or Lonestar5 systems," said Brian Beck, a life sciences researcher at TACC.

"Having TACC supercomputing resources available is critical to this style of research," Pettitt said.

FINDING THE ORDER IN DISORDERED PROTEINS

Another phenomenon that has long interested Pettitt is the behavior of Intrinsically Disordered Proteins (IDPs) and intrinsically disordered domains, where parts of a protein have a disordered shape.

Unlike crystals or the highly-packed DNA in viruses, which have distinct, rigid shapes, IDPs "fold up into a gooey mess," according to Pettitt. And yet they're critical for all forms of life.

It is believed that in eukaryotes (organisms whose cells have complex substructures like nuclei), roughly 30 percent of proteins have an intrinsically disordered domain. More than 60 percent of proteins involved in cell signaling (molecular processes that take signals from outside the cell or across cells that tell the cell what behaviors to turn on and off in response) have disordered domains. Similarly, 80 percent of cancer-related signaling proteins have IDP regions - making them important molecules to understand.

Among the IDPs Pettitt and his group are studying are nuclear transcription factors. These molecules control the expression of genes and have a signaling domain that is rich in the flexible amino acid, glycine.

The folding of the nuclear transcription factor signaling domain is not brought about by hydrogen bonding and hydrophobic effects, like most protein molecules, according to Pettitt. Rather, when the longer molecules find too many glycines in a space, they go beyond their solubility and start associating with each other in unusual ways.

"It's like adding too much sugar in your tea," Pettitt explains. "It won't get any sweeter. The sugar must fall out of solution and find a partner - precipitating into a lump."

Writing in Protein Science in 2015, he described molecular simulations performed on Stampede that helped to explain how and why IDPs collapse into globule-like structures.

The simulations calculated the forces from carbonyl (CO) dipole-dipole interactionsattractions between the positive end of one polar molecule and the negative end of another polar molecule. He determined that these interactions are more important in the collapse and aggregation of long strands of glycine than the formation of H-bonds.

"Given that the backbone is a feature of all proteins, CO interactions may also play a role in proteins of nontrivial sequence where structure is eventually determined by interior packing and the stabilizing effects of H-bonds and CO-CO interactions," he concluded.

The research was enabled by an allocation of compute time on Stampede through the Extreme Science and Engineering Discovery Environment (XSEDE) which is supported by the National Science Foundation.

Pettitt, a long-time champion of supercomputing, doesn't only use TACC resources himself. He encourages other scholars, including his colleagues at the Sealy Center for Structural Biology and Molecular Biophysics, to use supercomputers as well.

"Advanced computing is important for data analysis and data refinement from experiments, X-ray and electron microscopy, and informatics," he says. "All of these problems have big data processing issues that can be addressed using advanced computing."

When it comes to uncovering the mysteries of biology on the tiniest scales, nothing quite beats a giant supercomputer.

Explore further: Rosetta online server that includes everyone

More information: Christopher G. Myers et al, Phage-like packing structures with mean field sequence dependence, Journal of Computational Chemistry (2017). DOI: 10.1002/jcc.24727

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Researchers explore DNA folding, cellular packing with supercomputer simulations - Phys.Org

JLICH, July 3, 2017 Creating a modular supercomputer tailored to the complexity of state-of-the-art simulation codes and the growing range of tasks at computing centres this is the aim of DEEP-EST, an EU project launched on 1July 2017. The plan is to develop a prototype by 2020 that combines different computing modules according to the building-block principle. DEEP-EST is the successor project to the now successfully concluded DEEP and DEEP-ER projects and its plans include an additional new module suitable for applications managing large volumes of data. Sixteen leading international research institutions and companies are involved in the project, which is coordinated by Forschungszentrum Jlich.

For smartphones and laptops, it has long been more than simply computing power that counts: cameras, network interfaces, and GPS are just as important. A similar trend can be seen in the field of high-performance computing (HPC). In addition to compute-intensive simulations the traditional tasks undertaken in scientific computing centres new applications such as big data analytics and sophisticated visualizations are gaining importance but current supercomputer architectures cannot handle these tasks efficiently.

The optimization of homogeneous systems has more or less reached its limit. We are gradually developing the prerequisites for a highly efficient modular supercomputing architecture which can be flexibly adapted to the various requirements of scientific applications, explains Prof. Thomas Lippert, head of the Jlich Supercomputing Centre (JSC).

According to the Modular Supercomputing concept, accelerators and storage modules are no longer combined with individual CPUs using expansion cards but pooled into independent modules. Their units, called nodes, can be combined as needed. A flexibly adaptable system will be the end result, which will use pioneering technologies to form the basis for exascale computers: future supercomputers which will be more powerful by a whole order of magnitude than the fastest supercomputers today.

New module for big data

By 2020, a prototype is to be developed in DEEP-EST that should demonstrate the advantages of the concept. The project involves the introduction of a new data-analytics module to expand the ClusterBooster architecture of the previous DEEP and DEEP-ER projects. Making use of large storage capacity and flexibly programmable processors, called FPGAs, the data-analytics module is set to close a gap resulting from the different hardware requirements for high-performance computing (HPC) and high-performance data analytics (HPDA).

For conventional supercomputing applications, such as simulations from quantum physics, an extremely large number of mathematical operations are applied to a relatively small set of data. This requires systems with a lot of computing power but relatively little storage, explains Dr. Estela Suarez from the Jlich Supercomputing Centre (JSC). But applications are becoming significantly more complex and the volumes of data from present-day experiments, for example at CERN, are increasing in size. This means that supercomputers will require drastically larger storage capacities and they must be located as close to the processors as possible. Only then can the data be processed in a fast and energy-efficient manner, explains Estela Suarez.

Applications determine development

A total of six applications from relevant European research fields are drawn upon for the co-design development of the prototype. The requirements of the codes will influence its design. At the same time, the codes will benefit from optimizations in the course of the project. For example, together with KU Leuven, the researchers aim to adapt a code used to simulate the effect that powerful solar storms have on the Earth. Although such events are rare, they threaten to cause enormous damage, such as a failure of satellite communications or disrupted GPS, internet, and telephone connections.

Tests will reveal to what extent highly complex space weather simulations will profit from the modular supercomputer architecture. Different parts of the complex scientific code are allocated to different modules for this purpose. The system software environment that will also be developed as part of the project will ensure the best possible distribution. A sophisticated resource management is also planned to ensure that the different components of the architecture are used as efficiently as possible at all times, thus saving energy.

In the case of space-weather simulations, for example, particularly the data-intensive analysis of high-resolution satellite images is ideal for outsourcing to the Data-Analytics module. In contrast, other parts of the simulation code for example the interaction of particles emitted by the Sun with the Earths magnetic field are distributed to the Cluster module, which has powerful general-purpose processors, and the Booster, which is based on interlinked, highly parallel multicore processors.

Source: JSC

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DEEP-EST Modular Supercomputer Enters Next Round - HPCwire (blog)

ARGONNE, Ill., July 5, 2017 Theta, a new production supercomputer located at the U.S. Department of Energys Argonnne National Laboratory is officially open to the research community. The new machines massively parallel, many-core architecture continues Argonnes leadership computing program towards its future Aurora system.

Theta was built onsite at the Argonne Leadership Computing Facility (ALCF), a DOE Office of Science User Facility, where it will operate alongside Mira, an IBM Blue Gene/Q supercomputer. Both machines are fully dedicated to supporting a wide range of scientific and engineering research campaigns. Theta, an Intel-Cray system, entered production on July 1.

The new supercomputer will immediately begin supporting several 2017-2018 DOE Advanced Scientific Computing Research (ASCR) Leadership Computing Challenge (ALCC) projects. The ALCC is a major allocation program that supports scientists from industry, academia, and national laboratories working on advancements in targeted DOE mission areas. Theta will also support projects from the ALCF Data Science Program, ALCFs discretionary award program, and, eventually, the DOEs Innovative and Novel Computing Computational Impact on Theory and Experiment (INCITE) programthe major means by which the scientific community gains access to the DOEs fastest supercomputers dedicated to open science.

Designed in collaboration with Intel and Cray, Theta is a 9.65-petaflops system based on the second-generation Intel Xeon Phi processor and Crays high-performance computing software stack. Capable of nearly 10 quadrillion calculations per second, Theta will enable researchers to break new ground in scientific investigations that range from modeling the inner workings of the brain to developing new materials for renewable energy applications.

Thetas unique architectural features represent a new and exciting era in simulation science capabilities, said ALCF Director of Science Katherine Riley. These same capabilities will also support data-driven and machine-learning problems, which are increasingly becoming significant drivers of large-scale scientific computing.

Now that Theta is available as a production resource, researchers can apply for computing time through the facilitys variousallocation programs. Although the INCITE and ALCC calls for proposals recently closed, researchers can apply for Directors Discretionary awards at any time.

Argonne National Laboratoryseeks solutions to pressing national problems in science and technology. The nations first national laboratory, Argonne conducts leading-edge basic and applied scientific research in virtually every scientific discipline. Argonne researchers work closely with researchers from hundreds of companies, universities, and federal, state and municipal agencies to help them solve their specific problems, advance Americas scientific leadership and prepare the nation for a better future. With employees from more than 60 nations, Argonne is managed byUChicago Argonne, LLCfor theU.S. Department of Energys Office of Science.

The U.S. Department of Energys Office of Scienceis the single largest supporter of basic research in the physical sciences in the United States and is working to address some of the most pressing challenges of our time. For more information, visit theOffice of Science website.

Argonne National Laboratoryseeks solutions to pressing national problems in science and technology. The nations first national laboratory, Argonne conducts leading-edge basic and applied scientific research in virtually every scientific discipline. Argonne researchers work closely with researchers from hundreds of companies, universities, and federal, state and municipal agencies to help them solve their specific problems, advance Americas scientific leadership and prepare the nation for a better future. With employees from more than 60 nations, Argonne is managed byUChicago Argonne, LLCfor theU.S. Department of Energys Office of Science.

The U.S. Department of Energys Office of Scienceis the single largest supporter of basic research in the physical sciences in the United States and is working to address some of the most pressing challenges of our time. For more information, visit theOffice of Science website.

Argonne National Laboratoryseeks solutions to pressing national problems in science and technology. The nations first national laboratory, Argonne conducts leading-edge basic and applied scientific research in virtually every scientific discipline. Argonne researchers work closely with researchers from hundreds of companies, universities, and federal, state and municipal agencies to help them solve their specific problems, advance Americas scientific leadership and prepare the nation for a better future. With employees from more than 60 nations, Argonne is managed byUChicago Argonne, LLCfor theU.S. Department of Energys Office of Science.

The U.S. Department of Energys Office of Scienceis the single largest supporter of basic research in the physical sciences in the United States and is working to address some of the most pressing challenges of our time. For more information, visit theOffice of Science website.

Source: ANL

Originally posted here:

Argonne's Theta Supercomputer Goes Online - HPCwire (blog)

Last month, Top500.org posted the 49th edition of its biannual listing of top supercomputers. The top of the list is stable. The Chinese supercomputers Sunway TaihuLight and Tianhe 2, at 93 petaflop and 33.9 petaflops, respectively, remain the top two machines, says Network World.

There are some changes, however. The Swiss GPU-based Piz Daint doubled its performance to 19.6 petaflops, which moved it from eighth to third on the list.

Perhaps more significantly, according to Network Worlds Peter Sayer, were changes to the middle of the list. He writes that a 432-teraflop computer built in 2015 by Sugon in China had entered the listings in 213th place in 2015. Since then, 108 supercomputers have joined the top 500 list and kicked the Sugon device all the way down to last on the list.

Big Data and artificial intelligence (AI) are two disciplines that rely heavily on high-end computing platforms. Last month, Cray, perhaps the oldest and best known name in supercomputing, introduced the Urika-XC analytics software suite, which offers graph analytics, deep learning and Big Data analytics tools for use on its flagship Cray XC supercomputer platform. The software enables identification of patterns within massive datasets.

Supercomputers are about more than raw power. Precisely how that power is harnessed is important as well. Huffington Post describes an approach being taken at Los Alamos National Laboratory, which has been home to more than 100 supercomputers over the decades. The lab has introduced Charliecloud, a crisp 800-line code that enables Big Data operations without demanding changes with which computer staffs are likely unfamiliar.

This all may change very quickly. Like much else in technology, supercomputing is on the precipice of great change. Quantum computing, which relies on sci-fi like and virtually impossible to conceptualize technologies, will radically increase the capacity of computers. These devices seem to be set to become factors in the commercial sector. This means that the Top500 list may look significantly different in the relatively near future.

Carl Weinschenk covers telecom for IT Business Edge. He writes about wireless technology, disaster recovery/business continuity, cellular services, the Internet of Things, machine-to-machine communications and other emerging technologies and platforms. He also covers net neutrality and related regulatory issues. Weinschenk has written about the phone companies, cable operators and related companies for decades and is senior editor of Broadband Technology Report. He can be reached at cweinsch@optonline.net and via twitter at @DailyMusicBrk.

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Second Tier of Supercomputer Rankings Shifts as Quantum Looms - IT Business Edge (blog)

With universal quantum computers on the horizon, Atos has developed a simulation platform for programming the qubit-based machines.

According to Atos CEO Thierry Breton, this is the highest performing commercial quantum simulator in the world and reaffirms his companys ambition to be an industry leader in this emerging technology.

Quantum physics will lead to profound changes notably in cybersecurity, one of the key strategic priorities of businesses, said Breton. We must be planning for the impact of these today. The teams at our Atos Quantum laboratory have made remarkable progress, recognized and supported by an internationally renowned Scientific Council, to provide, today, scientists and engineers from around the world with a simulation environment which enables them to develop quantum algorithms to prepare for the major accelerations to come.

The simulator, known as the Atos Quantum Learning Machine (QLM) runs on a ultra-compact supercomputer, which the company says is the size of a regular enterprise server. It comes in five power configurations, from 30 to 40 qubits and is equipped with specific hardware components to accelerate specific quantum calculations and which can eventually be replaced by quantum accelerators.

The simulator itself appears to be implemented in firmware, which abstracts the quantum model onto conventional digital hardware. It can be programmed in a language called aQasm, which stands for Atos Quantum Assembly Language. Although it is currently meant to be used by quantum computing researchers to develop applications and algorithms for the simulator, the hope is that it will eventually be used on actual quantum computers after they come online. Being an assembly language, aQasm enables programmers to access the low-level elements of a quantum computing system, in this case, the quantum gates.

One of the critical application areas for quantum computing is cybersecurity. Ironically, because these systems are particularly adept at factoring integers into their prime components (Shors algorithm), it would make current encryption algorithms obsolete, thus threatening the digital security that protects banks and the internet. According to Atos, one of the intended uses of this technology is develop algorithms that cant be decrypted by quantum computers once they are built.

Both Google and IBM have constructed multi-qubit prototypes of universal quantum computers and expect to launch systems that can outperform conventional computers within the next few years.

Image source: Atos

Original post:

Atos Launches 40-Qubit Quantum Computing Simulator - TOP500 News

Creating a modular supercomputer tailored to the complexity of state-of-the-art simulation codes and the growing range of tasks at computing centres this is the aim of DEEP-EST, an EU project launched on 1 July 2017. The plan is to develop a prototype by 2020 that combines different computing modules according to the building-block principle. DEEP-EST is the successor project to the now successfully concluded DEEP and DEEP-ER projects and its plans include an additional new module suitable for applications managing large volumes of data. Sixteen leading international research institutions and companies are involved in the project, which is coordinated by Forschungszentrum Jlich.

For smartphones and laptops, it has long been more than simply computing power that counts: cameras, network interfaces, and GPS are just as important. A similar trend can be seen in the field of high-performance computing (HPC). In addition to compute-intensive simulations the traditional tasks undertaken in scientific computing centres new applications such as big data analytics and sophisticated visualizations are gaining importance but current supercomputer architectures cannot handle these tasks efficiently.

The optimization of homogeneous systems has more or less reached its limit. We are gradually developing the prerequisites for a highly efficient modular supercomputing architecture which can be flexibly adapted to the various requirements of scientific applications, explains Prof. Thomas Lippert, head of the Jlich Supercomputing Centre (JSC).

According to the Modular Supercomputing concept, accelerators and storage modules are no longer combined with individual CPUs using expansion cards but pooled into independent modules. Their units, called nodes, can be combined as needed. A flexibly adaptable system will be the end result, which will use pioneering technologies to form the basis for exascale computers: future supercomputers which will be more powerful by a whole order of magnitude than the fastest supercomputers today.

New module for big data

By 2020, a prototype is to be developed in DEEP-EST that should demonstrate the advantages of the concept. The project involves the introduction of a new data-analytics module to expand the ClusterBooster architecture of the previous DEEP and DEEP-ER projects. Making use of large storage capacity and flexibly programmable processors, called FPGAs, the data-analytics module is set to close a gap resulting from the different hardware requirements for high-performance computing (HPC) and high-performance data analytics (HPDA).

For conventional supercomputing applications, such as simulations from quantum physics, an extremely large number of mathematical operations are applied to a relatively small set of data. This requires systems with a lot of computing power but relatively little storage, explains Dr. Estela Suarez from the Jlich Supercomputing Centre (JSC). But applications are becoming significantly more complex and the volumes of data from present-day experiments, for example at CERN, are increasing in size. This means that supercomputers will require drastically larger storage capacities and they must be located as close to the processors as possible. Only then can the data be processed in a fast and energy-efficient manner, explains Estela Suarez.

Applications determine development

A total of six applications from relevant European research fields are drawn upon for the co-design development of the prototype. The requirements of the codes will influence its design. At the same time, the codes will benefit from optimizations in the course of the project. For example, together with KU Leuven, the researchers aim to adapt a code used to simulate the effect that powerful solar storms have on the Earth. Although such events are rare, they threaten to cause enormous damage, such as a failure of satellite communications or disrupted GPS, internet, and telephone connections.

Tests will reveal to what extent highly complex space weather simulations will profit from the modular supercomputer architecture. Different parts of the complex scientific code are allocated to different modules for this purpose. The system software environment that will also be developed as part of the project will ensure the best possible distribution. A sophisticated resource management is also planned to ensure that the different components of the architecture are used as efficiently as possible at all times, thus saving energy.

In the case of space-weather simulations, for example, particularly the data-intensive analysis of high-resolution satellite images is ideal for outsourcing to the Data-Analytics module. In contrast, other parts of the simulation code for example the interaction of particles emitted by the Sun with the Earths magnetic field are distributed to the Cluster module, which has powerful general-purpose processors, and the Booster, which is based on interlinked, highly parallel multicore processors.

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Modular Supercomputer Enters Next Round - I-Connect007

(EUROPE)

Belgium has joined a pan-European initiative to advance the development of super computer technologies.

Seven countries Italy, Germany, Luxembourg, Portugal, France, Spain, and the Netherlands signed a joint statement in Marchto support the next generation of computing and data infrastructures. Belgium will now partner with these nations to progressHigh Performance Computing (HPC) platforms that can be used by industry, academia and the public sector.

Theyplan to establishEuroHPC foracquiring and deploying an integrated world-class high-performance computing infrastructure capableof at least 1018calculations per second (so-called exascale computers). This will be available across the EU for scientific communities, industry and the public sector, no matter where the users are located, a European Union (EU) announcement in March said.

On Belgium becoming the eight country to back the venture,Andrus Ansip, European Commission Vice-President for the Digital Single Market, said: I am pleased that Belgium is now part of this ambitious project. Super computers have countless applications with a direct benefit on peoples lives. But EU countries cannot build and maintain this infrastructure on their own. This is why we have to join forces, and I invite more EU countries to get involved.

BelgiumEuropean Unionsuper computer

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Belgium joins super computer project - Innovators Magazine