RESEARCHERS CLAIM to have developed a new '3D chip' that could be the answer to some of the bandwidth issues plaguing the current generation of chips. <\/p>\n
The prototype, built by a team of researchers from Stanford and MIT, manages to combine memory, processor and sensors onto a single discrete unit made of graphene nanotubes, with resistive RAM (RRAM) squished over the top. <\/p>\n
The 3D computer architecture is, the team claims, \"the most complex nano-electronic system ever made with emerging nano-technologies\". <\/p>\n
Carbon has a higher tolerance to heat than silicon, and so using the carbon nanotubes means that the chip can stand up to higher temperatures than a regular chip - especially now the wafers are getting so ridiculously thin. <\/p>\n
Related: Researchers shift processing to memory to make things faster <\/p>\n
The research funded by the Defense Advanced Research Projects Agency (DARPA) and the US National Sanitation Foundation (!) is making good headway, but it is, for want of a better phrase, not backwards compatible' and so it could be a while before we see anything in the shops that uses the same technology. <\/p>\n
\"The devices are better: Logic made from carbon nanotubes can be an order of magnitude more energy-efficient compared to today's logic made from silicon, and similarly, RRAM can be denser, faster, and more energy-efficient compared to DRAM,\" said Philip Wong from the MIT team. <\/p>\n
The work has come on at a phenomenal pace, with a University of Wisconsin-Madison team first perfecting the nanotube system to overtake speeds possible in silicon chips as recently as last September. <\/p>\n
At that time, experts estimate the chips could take a current up to 1.9 times that of a conventional silicon dewberry. Ultimately it's thought that figure will increase to five times the speed, with a fifth of the energy, but again, no time frames. <\/p>\n
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Boffins create 3D CPU architecture to stretch Moore's Law more - The INQUIRER<\/a><\/p>\n","protected":false},"excerpt":{"rendered":" RESEARCHERS CLAIM to have developed a new '3D chip' that could be the answer to some of the bandwidth issues plaguing the current generation of chips. The prototype, built by a team of researchers from Stanford and MIT, manages to combine memory, processor and sensors onto a single discrete unit made of graphene nanotubes, with resistive RAM (RRAM) squished over the top. Continue reading